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Achievements

  1. Wang N., Li X. C., Mao J. F.，“High-Speed Interconnect System Using QPSK Scheme Based on Substrate Integrated Waveguide，”Journal of Circuits Systems and Computers, vol. 27, issue 1, pp: 19, 2018.
  2. Yan Shao, Xiao-Chun Li, Lin-Sheng Wu, Jun-Fa Mao, “A Wideband Millimeter-Wave Substrate Integrated Coaxial Line (SICL) Array for High-Speed Data Transmission,” IEEE Transactions on Microwave Theory and Techniques, vol. 65, No.8, pp.2789-2800, Aug. 2017.
  3. Xin Tan, Xiao-Chun Li, Junfa Mao, Time-Domain Analysis of Noise Coupling Between Package and PCB Power/Ground Planes Based on WLP-FDTD, IEEE Transactions on Components, Packaging and Manufacturing Technology, Volume: PP, Issue: 99, pp.1 - 7, Jan. 2017.
  4. Ning Wang, Xiao-Chun Li, Jun-fa Mao, “Improvement of Thermal Environment by Thermoelectric Coolers and Numerical Optimization of Thermal Performance,” IEEE Transactions on Electron Devices，vol62, no.8, pp.2579-2586, Aug. 2015.
  5. Wei Zhen, Li Xiaochun, and Mao Junfa, “An accurate RLGC circuit model for dual tapered TSV structure,” Journal of Semiconductors, Vol. 35, No. 9, Sept. 2014.
  6. Shen limei，LI Xiaochun，Mao Junfa，“High-speed transmission system based on SIW，” Journal of Shanghai Jiao Tong University, Sept, 2014。
  7. Xiao-chun Li, Jun-fa Mao, and Swaminathan Madhavan, “Transient Analysis of CMOS-Gate-Driven RLGC Interconnects Based on FDTD,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems vol. 30, no. 4, pp. 574 – 583, Apr. 2011.  
  8. Xiao-chun Li, Mao, Jun-Fa, “An area-efficient very large scale integration architecture for modified Euclidean algorithm with dynamic storage technique,” International Journal of Electronics, 96(8), pp 837-842, 2009.
  9.  Xiao-chun Li, Jun-fa Mao, Wen-yan Yin, “Dynamic Power Model of CMOS Gates Driving Transmission Lines Based on Fourier Analysis”, IEEE Transactions on Electron Devices. vol. 55, no. 2, pp.594-560, Feb. 2008. 
  10. Xiao-chun Li, Mao Jun-fa, Huang Hui-fen and Liu Ye, “Global Interconnect Width and Spacing Optimization for Latency, Bandwidth and Power Dissipation,” IEEE Transactions on Electron Devices, 2005, vol. 52, no. 10, pp. 2272–2279, Oct. 2005. 
  11. Xiao-chun Li and Jun-fa Mao, “Accurate Analysis of Interconnect Trees with Distributed RLC Model and Moment Matching”, IEEE Transactions on Microwave Theory and Techniques, vol. 52, no.9, pp. 2199 – 2206, Sept. 2004. 
  12. Min Tang, Jun-Fa Mao and Xiao-chun Li, “Analysis of Interconnects with Frequency-Dependent Parameters by Differential Quadrature Method,” IEEE Microwave and Wireless Components Letters, vol.15, no.12, pp. 877-879, Dec. 2005. 
  13. Hui-Fen Huang, Jun-Fa Mao, Xiao-chun Li, and Zhengfan Li, “A photonic bandgap microstrip filter based on YBCO superconducting film,” IEEE Transactions on Applied Superconductivity, vol.15, no.3, pp. 3827–3830, Mar. 2005. 
  14. Feng Cheng, Jun fa Mao, and Xiao-chun Li, “Timing-driven placement based on path topology analysis,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88, no. 8, pp. 2227–2230, Aug. 2005. 
  15. Xiao-chun Liand Junfa Mao, “A New Delay Model for Distributed RLC Trees,” Journal of Active and Passive Electronic Devices, vol. 1 pp. 259–271, Jan. 2006.
  16. Xiao-chun Li and Junfa Mao, “An Area-Efficient Euclid Architecture with Low Latency,” Journal of Active and Passive Electronic Device, vol. 1 pp. 221–227, Jan. 2006.
  17. Xiao Wang，Junfa Mao, and Xiaochun Li, “A Static Voltage Drop Analysis Method of Standard Cell Chip,” Journal of Shanghai Jiao Tong University, vol. 41, no. 8，pp. 1362-1365, Aug. 2007.
  18. Feng Cheng，Junfa Mao, and Xiaochun Li, “The Congestion Estimation and Minimization during Placement ,” Journal of Shanghai Jiao Tong University, vol. 40, no.3，pp. 369-372, Mar. 2006.
  19. Yinglei Ren, Junfa Mao, and Xiaochun Li, “The Analytical Delay Models for RLC Interconnect s under Ramp Input,” Journal of Shanghai Jiao Tong University, vol. 40, no.3，pp. 373-376, Mar. 2006.
  20. Zhangcai Huang, Junfa Mao, and Xiaochun Li, “A Mode l of Computing the Effective Capacitance of Interconnect Loa d,” Journal of Shanghai Jiao Tong University, vol. 38 Sup, pp. 115-117, Oct.. 2004.
  21. Ji Sun, Junfa Mao, and Xiaochun Li, “A Non-Zero Skew Clock Tree Routing Algorithm,” Microelectronics，vol.35, no.3, pp.293-296, June 2005.
  22. Jie Ren, Junfa Mao, and Xiaochun Li, “A Static Voltage Drop Analysis Method of Standard Cell Chip,” Microelectronics，vol.35, no.3, pp. 286-289, June 2005.
  23. Zhangcai Huang, Junfa Mao, and Xiaochun Li, “A Predictive Delay Model for CMOS Buffers,” Microelectronics，vol.34, no.5, pp. 540-542, Oct. 2004.
  24. Yanfeng chen, Junfa Mao, and Xiaochun Li, “Estimation of Interconnect Tree Delay Based on the Lumped RLC Parameter Model”, Microelectronics，vol.34, no.3, pp. 265-268, June 2004.
  25. Changhui Li, Junfa Mao, and Xiaochun Li, “Time Delay Estimation and Data Analysis of Parallel Interconnect Lines in High Speed Circuits,” Microelectronics，vol.34, no.6, pp. 648-651, Dec. 2004.
  26. Liang Ge, Junfa Mao, and Xiaochun Li, “An Algorithm for Critical l Path Extraction in IC Timing Analysis with Consideration of Slew,” Microelectronics，vol.35, no.2, pp. 125-129, Apr. 2004.
  27. 魏鑫，李晓春，邵妍，毛军发，“一种新型的双L型基片集成同轴互连阵列”，微波学报，2016, 8(4):59-64。
  28. 余佩，李晓春，王宁，毛军发，“基于WLP-FDTD的电源地网络时域快速分析方法，”《微波学报》，2016, 32(1):31-35。
  29. 余佩，李晓春，王宁，毛军发，“基于WLP-FDTD方法的传输线瞬态分析与计算，”《计算物理》，2016, 33(2):197-204。
  30. 袁希望，李晓春，袁斌，王宁，毛军发，“基于半模基片集成波导的高速数据传输系统,”《微波学报》，2015, 31(5):41-45。
  31. 王宁，李晓春，毛军发，袁希望，邵妍，刘正，“基于坐标平面旋转的比幅测角方法，”《微波学报》，2014年9月，第30卷，第6期，页码：69-73。

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